View W24V04_1939713.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

preliminary W24V04 512k 8 cmos static ram publication release date: january 2000 - 1 - revision a1 general description the W24V04 is a normal - speed, very low - power cmos static ram organized as 524288 8 bits that operates on a wide voltage range from 2.3v to 2.7v power supply. the W24V04, W24V04 - le and W24V04 - li, can meet the req uirement of various operating temperature. this device is manufactured using winbond's high performance cmos technology. features low power consumption access time: 85 ns 2.3v to 2.7v supply voltage fully static operation all inputs and outputs directly ttl compatible three - state outputs battery back - up operation capability data retention voltage: 1.5v (min.) packaged in 32 - pin 450 mil sop, standard type one tsop (8 mm 20 mm), small type one tsop (8 mm 13.4 mm ) and 36 - pin csp pin configurations block diagram 32-pin sop a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 v ss 1 5 2 3 4 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a18 a16 a14 v dd a13 a8 a9 a11 a10 i/o8 i/o7 i/o6 i/o5 i/o4 we oe cs a15 a17 36-pin csp top view 1 2 3 4 5 6 a a0 a1 nc a3 a6 a8 b i/o5 a2 we a4 a7 i/o1 c i/o6 nc a5 i/o2 d v ss v cc e v cc v ss f i/o7 a17 i/o3 g i/o8 oe cs a16 a15 i/o4 h a9 a10 a11 a12 a13 a14 1 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 32-pin tsop 2 a3 a2 a1 a0 i/o7 i/o6 i/o5 i/o4 oe i/o8 a10 cs v ss i/o3 i/o2 i/o1 a6 a13 a15 a12 a7 a5 a4 a8 v dd a11 a9 a14 a16 we a18 a17 a18 core cell array 1024 rows 512 x 8 columns data cntrl. clk gen. r o w d e c o d e r a6 i/o ckt. column decoder we oe clk gen. precharge ckt. a5 a4 a3 a2 a1 a0 cs a18 a17 a16 a15 a14 a13 a12 a10 a8 a7 i/o1 i/o8 : a9 a11 pin description symbol description a0 - a18 address inputs i/o1 - i/o8 data inputs/outputs cs chip select input we write enable input oe output enable input v dd power supply v ss ground nc no connection
preliminary W24V04 - 2 - truth table cs oe we mode i/o1 - i/o8 v dd current h x x not selected high z i sb , i sb 1 l h h output disab le high z i dd l l h read data out i dd l x l write data in i dd dc characteristics absolute maximum ratings parameter rating unit supply voltage to v ss potential - 0.5 to +4.6 v input/output to v ss potential - 0.5 to v dd +0.5 v allowable power dissipatio n 1.0 w storage temperature - 65 to +150 c operating temperature le - 20 to 85 c li - 40 to 85 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. operating characteristics (v ss = 0v; t a ( c) = - 20 to 85 for le, - 40 to 85 for li) parameter sym. test W24V04 unit conditions min. max. operating power voltage v dd - 2.3 2.7 v input low voltage v il - - 0.2 +0.4 v input high voltage v ih - +2.0 v dd +0.2 v input leakage current i li v in = v ss to v dd - 1 +1 m a output leakage current i lo v i/o = v ss to v dd cs = v ih (min.) or oe = v ih (min.) or we = v il (max.) - 1 +1 m a output low voltage v ol i ol = +0.5 ma - 0.4 v output high voltage v oh i oh = - 0.5 ma 2.0 - v
preliminary W24V04 publication release date: january 2000 - 3 - revision a1 operating characteristics, continued parameter sym. test W24V04 unit conditions min. max. operating power supply current i dd cs = v il (max.) i/o = 0 ma cycle = min. duty = 100% - 30 ma standby power supply current i sb cs = v ih (min.) duty = 100% - 0.3 ma i sb1 cs 3 v dd - 0.2v - 5 m a capacitance (t a = 25 c, f = 1 mhz) parameter sym. conditions max. unit input capacitance c in v in = 0v 8 pf input/output capacitance c i/o v out = 0v 10 pf note: these parameters are sampled but not 100% tested. ac characteristics ac test conditions parameter conditions input pulse levels 0v to 2.5v input rise and fall times 5 ns input and output timing reference level 1.2v output load see the drawing below ac test loads and waveform 90% 90% 5 ns 10% 5 ns 10% output output 2.5v 0v 100 pf including jig and scope 5 pf including jig and scope 1 ttl 1 ttl clz, olz, chz, ohz, whz, ow (for t t t t t t )
preliminary W24V04 - 4 - ac characteristics, continued (v ss = 0v; t a ( c) = - 20 to 85 for le, - 40 to 85 for li) read cycle parameter sym. W24V04 unit min. max. read cycle time t rc 85 - ns address access time t aa - 85 ns chip select access time t acs - 85 ns output enable to output valid t aoe - 50 ns chip selection to output in low z t clz * 10 - ns output enable to output in low z t olz * 5 - ns chip deselection to output in high z t chz * - 35 ns output disable to output in high z t ohz * - 35 ns output hold from address change t oh 10 - ns * these parameters are sampled but not 100% tested write cycle parameter sym. W24V04 unit min. max. write cycle time t wc 85 - ns chip se lection to end of write t cw 75 - ns address valid to end of write t aw 75 - ns address setup time t as 0 - ns write pulse width t wp 65 - ns write recovery time cs , we t wr 0 - ns data valid to end of write t dw 50 - ns data hold from end of write t dh 0 - ns write to output in high z t whz * - 35 ns output active from end of write t ow 8 - ns * these parameters are sampled but not 100% tested
preliminary W24V04 publication release date: january 2000 - 5 - revision a1 timing waveforms read cycle 1 (address controlled) address t rc t aa t oh t oh d out read cycle 2 (chip select controlled) cs d out t clz t acs chz t read cycle 3 (output enable controlled) address t rc cs t aa oe t aoe t olz t oh d t acs out clz t chz t t ohz
preliminary W24V04 - 6 - timing waveforms, continued write cycle 1 address oe t wc t wr we d out d in t wp t as t ohz (1, 4) t dw t dh t aw cs t cw write cycle 2 ( oe = v il fixed) we d out d in t as t dh t wp t whz dw t (2) (3) t ow t oh aw t (1, 4) t cw t wr address t wc cs notes: 1. during this period, i/o pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. the data output from d out are the same as the data written to d in during the write cycle. 3. d out provides the read data for the next address. 4. transition is measured 500 mv from steady state with c l = 5 pf. this parameter is guaranteed but not 100% tested.
preliminary W24V04 publication release date: january 2000 - 7 - revision a1 data retention chara cteristics (t a ( c) = - 20 to 85 for le; - 40 to 85 for li) parameter sym. test conditions min. typ. max. unit v dd for data retention v dr cs 3 v dd - 0.2v 1.5 - - v data retention current i dddr cs 3 v dd - 0.2v, v dd = 3.0v - - 5 m a chip deselect to data retention time t cdr see data retention waveform 0 - - ns operation recovery time t r t rc * - - ns * read cycle time data retention wavef orm t cdr - 0.2v dd v v dd cs t r cs v dr 1.5v = > = > 0.9 x dd v 0.9 x dd v
preliminary W24V04 - 8 - ordering information part no. access time ( n s) operating voltage (v) / standby current ( m a) operating temperature ( c) package W24V04b - 85le 85 2.5v / 5 m a - 20 to 85 csp W24V04q - 85le 85 2.5v / 5 m a - 20 to 85 small type one tsop W24V04s - 85le 85 2.5v / 5 m a - 20 to 85 450 mil sop W24V04t - 85le 85 2.5v / 5 m a - 20 to 85 standard type one tsop W24V04b - 85li 85 2.5v / 5 m a - 40 to 85 csp W24V04q - 85li 85 2.5v / 5 m a - 40 to 85 small type one tsop W24V04s - 85li 85 2.5v / 5 m a - 4 0 to 85 450 mil sop W24V04t - 85li 85 2.5v / 5 m a - 40 to 85 standard type one tsop W24V04b - 85ll 85 2.5v / 20 m a 0 to 70 csp W24V04q - 85ll 85 2.5v / 20 m a 0 to 70 small type one tsop W24V04s - 85ll 85 2.5v / 20 m a 0 to 70 450 mil sop W24V04t - 85ll 85 2.5v / 20 m a 0 to 70 standard type one tsop notes: 1. winbond reserves the right to make changes to its products without prior notice. 2. purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
preliminary W24V04 publication release date: january 2000 - 9 - revision a1 package dimensions 32 - pin sop wide body 1 17 32 16 y e d s seating plane b a a e h l l e e 1 c e 1 1 e a 2 see detail f detail f 1. dimensions d max. & s include mold flash or tie bar burrs. 2. dimension b does not include dambar protrusion/intrusion. 3. dimensions d & e include mold mismatch and determined at the mold parting line. . notes: 4. controlling dimension: inches 5. general appearance spec should be based on final visual inspection spec. 0.20 0.15 0.008 0.006 symbol min. nom. max. max. nom. min. dimension in inches dimension in mm a b c d e h e l y a a l e 1 2 e 0.012 0.31 0.118 3.00 0.004 0.101 0.014 0.106 0.016 0.111 0.020 2.57 0.36 0.10 2.69 0.41 2.82 0.51 0.047 0.004 0 10 0.805 0.055 0.817 0.063 1.19 20.45 1.40 20.75 1.60 0.556 0.556 0.546 14.38 14.12 13.87 10 0 0.10 11.43 11.30 11.18 0.450 0.445 0.440 0.58 0.79 0.99 0.023 0.031 0.039 1.12 1.27 1.42 0.044 0.050 0.056 s 0.91 0.036 q q 32 - pin standard type one tsop a a a 2 1 l l 1 y c e h d d b e m 0.10(0.004) q min. nom. max. min. nom. max. symbol a a b c d e e l l y 1 1 2 a h d controlling dimension: millimeters dimension in inches 0.047 0.006 0.041 0.039 0.037 0.007 0.008 0.009 0.005 0.006 0.007 0.720 0.724 0.728 0.311 0.315 0.319 0.780 0.787 0.795 0.020 0.016 0.020 0.024 0.031 0.000 0.004 1 3 5 0.002 1.20 0.05 0.15 1.05 1.00 0.95 0.17 0.12 18.30 7.90 19.80 0.40 0.00 1 0.20 0.23 0.15 0.17 18.40 18.50 8.00 8.10 20.00 20.20 0.50 0.50 0.60 0.80 0.10 3 5 dimension in mm q __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ 1
preliminary W24V04 - 10 - package dimensions, continued 32 - pin sm all type one tsop a a a 2 1 l l 1 y c e h d d b e 1 q controlling dimension: millimeters min. dimension in mm nom. max. min. nom. max. symbol a a b c d e e l l y 1 1 2 a h d 11.70 13.20 0.675 1.25 0.05 0.15 1.05 1.00 0.95 0.17 0.14 0.30 0.00 0.20 0.27 0.15 0.16 11.80 11.90 13.40 13.60 0.50 0.50 0.70 0.10 0.049 0.006 0.041 0.039 0.037 0.007 0.008 0.009 0.0056 0.0059 0.0062 0.461 0.465 0.469 7.90 8.00 8.10 0.311 0.315 0.319 0.520 0.528 0.536 0.020 0.012 0.020 0.028 0.027 0.000 0.004 0 3 5 0 3 5 0.002 q dimension in inches
preliminary W24V04 publication release date: january 2000 - 11 - revision a1 version history version date page description a1 jan. 2000 - initial issued headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5796096 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-27197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-27190505 fax: 886-2-27197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2727 n. first street, san jose, ca 95134, u.s.a. tel: 408-9436666 fax: 408-5441798 note: all data and specifications are subject to change without notice.

▲Up To Search▲

Price & Availability of W24V04

	To Download W24V04 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .